Doping in semiconductor chip processes - diffusion and ion implantation

We talked about the semiconductor lithography process, today we will talk about the doping of semiconductor devices. Just like cooking, you need to put in a variety of seasonings to make the color and flavor, put too much will be salty, put less is not tasty; doping is equivalent to the process and purpose of "adding oil and vinegar" in the semiconductor.

　　Doping, is a certain number of impurities into the semiconductor material doping process, is to change the electrical properties of semiconductor materials, so as to get the required electrical parameters. We also often hear that certain properties can be optimized by improving the doping concentration of where.

　　The main methods of doping are diffusion and ion implantation, both of which are useful in discrete devices or integrated circuits, and they can be considered complementary, for example, diffusion can be applied to form deep junctions and ion implantation to form shallow junctions.

Here we will talk about the two doping methods, diffusion and ion implantation, respectively.

　　I. Diffusion

　　Impurity diffusion is generally accomplished by placing a semiconductor wafer in a precisely controlled high-temperature quartz tube furnace and passing it through a gas mixture with the impurities to be diffused, the number of impurity atoms diffused into the semiconductor being related to the partial pressure of the impurities in the gas mixture. For the diffusion of silicon, the commonly used temperature range is generally from 800°C to 1200°C. Boron is the most commonly used p-type impurity, and arsenic and phosphorus are the most commonly used n-type impurities. These three elements in silicon are relatively high solid solution, the use of doping forms are: solid-phase sources (such as BN, As2O3, P2O5), liquid-phase sources (BBr3, AsAl and POCl3) and vapor-phase sources (B2H6, AsH3 and PH3), of these three forms, the liquid-phase sources are most widely used

The phosphorus is reduced and diffused into the silicon by an oxidation reaction, while the resulting Cl2 is expelled. The reaction equation involved is as follows.

　　4POCl3+3O2→2P2O3+6Cl2

　　2P2O5+5Si→4P+5SiO3

　　Impurity diffusion in semiconductors we can think of as the movement of impurity atoms in the lattice in the form of vacancies or interstitial atoms. In the following, we introduce two diffusion mechanisms: alternative diffusion mechanism and gap-filling diffusion mechanism.

　　▪ Alternative diffusion mechanism

Hollow circles indicate matrix atoms in lattice equilibrium positions, and red solid circles indicate impurity atoms. At high temperatures, the lattice atoms vibrate near the lattice equilibrium position, and the matrix atoms have a certain chance to gain enough energy to break away from the lattice and become gap atoms, creating a vacancy, which can then be occupied by neighboring impurity atoms, which is called substitution diffusion or vacancy diffusion.

　　Gap-filling diffusion mechanism

If an interstitial impurity atom moves from one position to another and does not occupy a lattice point, we call this gap-filling diffusion, which is generally used when the impurity atom is small relative to the matrix atom.

　　The diffusion distribution of impurity atoms is related to its initial conditions and boundaries. Here is a brief introduction of two diffusion methods, one is constant source diffusion, from the name we know that the surface concentration of impurity source is kept constant throughout the diffusion process; the other is called finite source diffusion, that is, a certain amount of impurities precipitated on the surface of the semiconductor, followed by diffusion into the semiconductor, the process is no longer applied to any impurity source.

　　Generally we use a two-step diffusion method in the IC process: firstly, the pre-precipitation diffusion layer is formed under constant source diffusion conditions, and then the main diffusion is carried out under finite source diffusion conditions, which can better and more accurately obtain the diffusion distribution.

　　Diffusion process results we will generally evaluate by special test methods, there are the following three: junction depth method, thin layer resistance method (four-probe method measurement) and the impurity distribution of the diffusion layer (capacitive voltage method, secondary ion mass spectrometry SIMS).

　　The above is just a brief chat about the concept of diffusion and several diffusion mechanisms and methods, are relatively shallow, in-depth those who are interested in the area can dig deeper. Here we will talk about ion injection 

　　Second, ion injection

　　In the beginning we gave two diagrams of diffusion and ion injection, if diffusion is more gentle, then ion injection is a bit violent. From the figure below (C represents the doping concentration, x is the depth of the semiconductor from the surface), we can see that the doping distribution then shows a peak distribution in the semiconductor, the shape of the distribution depends mainly on the quality of the doped ion and the energy of the ion when injected.

Ion implantation is the doping of charged ions with a certain energy into silicon with an energy between 1 keV and 1 MeV, which corresponds to an average ion distribution depth of 10 nm to 10 um. The main advantage of ion implantation over diffusion is that the amount of impurity doping can be controlled more precisely, maintaining good repeatability, and the process temperature of ion implantation is lower than diffusion.

　　The following processes are generally associated with ion implantation: multiple injection, masking layer, inclined angle injection, high energy injection, and high current injection.

　　▪ Several uses of ion implantation serve the following purposes.

　　①Multiple injections to form specific distributions.

　　② Selecting appropriate masking material and thickness to block a certain percentage of incident ions from entering the substrate.

　　③ Inclined angle injection to form ultra-shallow junctions.

　　④ high-energy injection to form buried layers.

　　⑤ High-current injection is used for pre-precipitation in diffusion techniques, threshold voltage adjustment, and for SOI applications to form an insulating layer (SOI: Silicon-On-Insulator, Silicon on Insulating Substrate, which is a technique where a buried oxide layer is introduced between the top layer of silicon and the backing substrate).

       The ion source is heated to decompose the source gas into charged ions by adding a voltage of about 40 KV, which guides these charged ions to move out of the ion source cavity and into the magnetic analyzer. We can set the magnetic field strength of the magnetic analyzer to allow the required ions to pass through. The selected ions enter the accelerator tube, where they are accelerated under high pressure to obtain the required energy for injection. Slits are used to ensure that the ion beam is not deflected. The air pressure inside the injection system is maintained below minus four tenths of a Pa to minimize ion scattering caused by gas molecules, and an electrostatic deflector plate is used to scan the entire wafer surface and inject these ion beams into the semiconductor substrate.

　　After entering the semiconductor, the energetic ions end up at a certain depth within the lattice. The negative impact of ion injection is mainly due to the fracture or damage of the semiconductor lattice caused by ion collisions, so annealing must be performed in a subsequent process to eliminate this damage.

　　Due to the lattice damage caused by high-energy ion injection, parameters such as mobility and lifetime of the semiconductor are severely affected, and since most of the ions are not in replacement positions during the injection, the semiconductor must be annealed at the appropriate time and temperature in order to activate the injected ions and restore mobility and other related parameters.